 | |
| ELEN0070-1 | Signal Processing
 |
|
| Duration : | 30h Th, 30h Pr |
|
| Credits/ECTS : |
| Bachelor in engineering sciences, civil engineer orientation (Bachelor in engineering sciences, civil engineer orientation), 3rd year | | First semester | | 5 |
|
| Master in Electrical Engineering, in-depth approach, 1st year | | First semester | | 5 |
|
| Master in Computer Engineering, in-depth approach, 1st year | | First semester | | 5 |
|
| Master in Computer science, Research Focus, 2nd year | | First semester | | 6 |
|
| Master in Engineering Physics, in-depth approach, 1st year | | First semester | | 5 |
|
| Master en ingénieur civil électricien, à finalité spécialisée en technologies durables en automobile, 1st year | | First semester | | 5 |
|
| Master in Electrical Engineering, specialized approach, 1st year | | First semester | | 5 |
|
| Master in Computer Engineering, specialized approach, 1st year | | First semester | | 5 |
|
| Master in Engineering Physics, specialized approach, 1st year | | First semester | | 5 |
|
|
|
| Holder(s) : | Jacques Verly |
|
| Language : | French language |
|
| Remarks : | Detailed course information is available from http://intelsig.montefiore.ulg.ac.be/~ries/ or from the Montefiore Institute website http://www.montefiore.ulg.ac.be/
under the name of Verly Jacques. |
|
|
| |
